A quantum multiply-accumulator

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Maynard, C. M. and Pius, E. (2014) A quantum multiply-accumulator. Quantum Information Processing, 13 (5). pp. 1127-1138. ISSN 1570-0755 doi: 10.1007/s11128-013-0715-5

Abstract/Summary

This paper proposes a quantum multiply-accumulator circuit (QMAC), which can perform the calculation on conventional integers faster than its classical counterpart. Whereas classically applying a multiply–adder (MAC) n times to k bit integers would require O(n log k) parallel steps, the hybrid QMAC needs only O(n+k) steps for the exact result and O(n+log k) steps for an approximate result. The proposed circuit could potentially be embedded in a conventional computer architecture as a quantum device or accelerator, enabling a wide range of applications to execute faster.

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Item Type Article
URI https://reading-pure-test.eprints-hosting.org/id/eprint/143334
Identification Number/DOI 10.1007/s11128-013-0715-5
Refereed Yes
Divisions Central Services
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